This seminar course is designed to cover topics specific to the design and implementaiton of specialized computer architectures. This includes instruction set modifications, fpga-based systems, large-scale systems, and emerging on-chip accelerators. Upon completion of the course, students should be able to analyze algorithms for potential hardare acceleration, critically read computer architecture papers, design and execute a small scale research project, present results both written and orally, use an fpga or simulator to evaluate architectural tradeoffs.

Prerequisites: Compsci 550 / ECE 552 or equivalent, ability to understand algorithm implementations in software, or consent of instructor.

Meeting Time & Location

Lecture: Wednesday, Friday 3:05 - 4:20pm, North 306
Office Hours: TBD


Alvin Lebeck
Email: alvy AT
Office: D308 Levine Science Research Center
Office Hours: TBD